Synopsys' New DesignWare IP Slashes Power in Datapath Circuits
Synopsys, Inc., a world leader in software and IP for semiconductor design, verification and manufacturing, announced the DesignWare minPower Components, a new IP product that is an integral part of the Synopsys Eclypse Low Power Solution. The DesignWare minPower Components dramatically reduce power in datapath logic compared to traditional power optimization methods. By using the DesignWare minPower Components, leading wireless, networking and DSP companies achieved power reduction of up to 48 percent in datapath logic.
"Optimizing the power consumption of datapath circuits in mobile applications can significantly extend battery life because these blocks are often on, even in standby mode," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Our customers have achieved an additional 7 to 48 percent reduction in power for these circuits."
"As the high speed networking market evolves to support another 10X increase in data rates, power dissipation has become an important issue in the adoption of next-generation technologies," said Jag Bolaria, senior analyst at The Linley Group. "To be competitive, chip manufacturers need to optimize power dissipation in the datapath. Synopsys' DesignWare minPower Components include innovative techniques that address this problem - enabling designers to further reduce power consumption at advanced data rates."
Today's conventional techniques do not address reducing specific power elements such as glitch power in deep logic levels and dynamic power in high-performance datapath pipelines. The DesignWare minPower Components offer unique, power-optimized datapath architectures that enable the DC Ultra synthesis tool to automatically generate circuits that suppress switching activity and glitches, reducing both dynamic and leakage power for mobile devices and high-performance applications. Based on the actual switching activities, transition probabilities, available standard cells and analysis of possible configurations, the DesignWare minPower Components architectures are automatically configured by DC Ultra to implement the optimal structure with the lowest power consumption. In addition to the automatically inferable components, the DesignWare minPower Components also include more than 40 instantiable components that incorporate low power design techniques such as enhanced clock gating, built-in datapath gating and patented data-tracking pipeline management technology to reduce power consumption.
The DesignWare minPower Components are tightly integrated with the Synopsys Galaxy Implementation Platform, which enables significant optimization of a design's total power compared to existing flows. The unique architectures in the DesignWare minPower Components allow high-level datapath structures to be automatically optimized based on power costing and switching activities. Applications with datapath circuits that have a high percentage of active time, such as wireless receivers, audio/video processors, CPUs, media processors, and signal processing blocks for high-performance networking and storage, are ideal candidates for the DesignWare minPower Components.
The table below shows the overall improvements in area and power in datapath circuits as recorded from initial customers designing wireless connectivity and high-performance networking applications. While the total chip power reduction achieved with the DesignWare minPower Components will vary, initial customers have reported design power reductions ranging from 2 to 20 percent in tested modes.
The DesignWare minPower Components are scheduled for general availability in Q3 of calendar year 2009. For more information on the DesignWare minPower Components, please visit: http://www.synopsys.com/minpower. For more information on the Eclypse Low Power Solution, visit: http://www.synopsys.com/lowpower.